Dr. Mahalingam College of Engineering and Technology, Pollachi, through the Department of Electronics Engineering (VLSI Design and Technology) and the Silittron Association, is organising a two-day workshop titled “Automated Layout Optimization Techniques” as part of its academic enrichment initiatives. The sessions will be handled by Mr. P. Karthikraja, Lead Engineer, SiMaxTech Pvt. Ltd., Bengaluru, along with Mr. Talluri Vineel Jessy, Research Associate III, and Ms. M. Manjubala, Junior Research Fellow from the C2S Project, Dr. Mahalingam College of Engineering and Technology, Pollachi. The workshop aims to provide practical exposure to automated layout optimization methodologies and their relevance in modern VLSI design. The programme is scheduled to be held on 30 and 31 January 2026 at Venue C-426, focusing on enhancing industry-oriented design skills among students and the academic community.

The SILITTRON Association organized a Tech Talk for III Year Electronics Engineering (VLSI Design and Technology) students, providing a platform to explore emerging technologies and enhance technical communication skills. A total of 6 participants presented on various advanced topics, while around 60 students attended the event. The session encouraged knowledge sharing, discussion, and peer learning. The event was held on 5 November 2025 at NPT Hall – 12, from 9:00 AM to 4:30 PM, and concluded with a cash prize of ₹1000 awarded to the best performer.

workshop on Design Thinking in Analog and Digital Design Flow using Cadance EDA Tool conducted for II  year Electronics Engineering ( VLSI Design and Technology) students. The workshop bridges theoretical knowledge with practical design flow, covering both analog and digital aspects crucial for VLSI design. Design thinking fosters creativity in tackling design challenges.

The Department of Electronics Engineering - VLSI Design and Technology at Dr.Mahalingam College of Engineering and Technology, Pollachi, organized a three-day workshop on "Analog VLSI & FPGA: Design to Implementation" from October 6th to 8th, 2025.

VLSI EVENT-2

VLSI EVENT-1

VLSI EVENT-5

VLSI EVENT-3

VLSI EVENT-4

VLSI EVENT-8

VLSI EVENT-6

VLSI EVENT-7

The Department Association SILLITRON of Electronics Engineering (VLSI Design and Technology) conducted Techno Conference 2025, an institution-level technical conference that brought together students from ECE, EEE, VLSI, and ACT departments to present and discuss innovative ideas in IC Design, FPGA Design, 5G Communication, IoT & Embedded Systems, and Power Systems. The event witnessed active participation from 79 students across 26 teams, promoting technical collaboration and innovation.

The Department of Electronics Engineering (VLSI Design and Technology), Dr. Mahalingam College of Engineering and Technology, Pollachi, proudly inaugurated its Department Association SILITTRON for the Academic Year 2025–2026 on 9th August 2025 (Saturday) at the EEE Seminar Hall from 1:00 pm to 4:00 pm.

 

 

 

 

 

 

 

 

 

 

The Department of Electronics Engineering (VLSI Design & Technology) successfully organized the Valedictory Ceremony of the Silitron Association for the academic year 2024–2025 on 29th April 2025 at NPT Seminar Hall 12.